Demo 4.2: One Gate to Rule Them All
The previous demonstration ended on a claim: that NAND on its own can be wired to produce every other gate in the set. This demonstration makes good on it, and then does the same thing again with NOR.
That claim is more important than it first sounds. If a single gate type can reproduce all the others, then a manufacturer does not need to make eight different parts, a chip designer does not need eight different cells in a library, and a fabrication process only has to be good at one thing. Universality is the reason the 7400, four NAND gates in a fourteen-pin package, is the part number most engineers learn to apply first.
It also has a limit that is easy to miss. Not every set of gates is universal. AND and OR together, however many of them you use and however you arrange them, cannot produce an inversion. Seeing why not how you understand what “universal” means.
How to use it
Section titled “How to use it”Choose whether to build from NAND or from NOR, then pick a target gate. The construction is drawn for you and the inputs are clickable.
The control worth your focus is Show internal levels. With it off you see only what goes in and what comes out, which is the view that lets you predict. With it on, every wire inside the circuit carries its current value, which is the view that lets you check. Predict first, then reveal. That order is the exercise.
Along with the constructions there is a frame of three gates you wire yourself, and beside that a short section on what is not universal.
One Gate Is Enough
Pick one gate type, then build every other gate out of it.
Walkthrough
Section titled “Walkthrough”Five steps, a few minutes each.
Step 1: Everything starts with inversion
Section titled “Step 1: Everything starts with inversion”Select NAND and NOT. Tie both inputs of a NAND together and it can only ever see 0,0 or 1,1, which are the two rows of its truth table that produce 1 and 0 respectively. One gate, and you have an inverter.
The panel to the right of the comparison makes this concrete. It shows the ordinary NAND truth table with the two rows that can no longer occur struck out, because a single signal driving both legs can never make them disagree. Nothing about the gate has changed. Two of its rows have simply become unreachable, and what survives is an inverter. Click the input and watch which row the gate moves to.
This is the step everything else rests on. Once you can invert, you can undo the bubble (the inversion symbol) on any gate, and undoing the bubble is what turns NAND into AND and NOR into OR. Try NOR and NOT as well: the same trick works, for the same reason.
Now select Buffer. Two tied gates in series, and the panel marks both, so you can see the first sitting on one surviving row and the second on the other.
Step 2: The named gate is the cheapest one
Section titled “Step 2: The named gate is the cheapest one”Still on NAND, compare AND with OR. AND costs two gates and OR costs three. Now switch to NOR and compare the same pair: OR costs two and AND costs three.
That is not a coincidence, and the dashed labels on the schematic say why. In the two-gate AND, the first box reads NAND and the second reads inverter: a NAND already is an AND with an inverted output, so recovering AND means cancelling one inversion (bursting one bubble!). Recovering OR means changing the shape of the operation, not just its sense, which takes an inverter on each input before the last gate can do its work. Whichever primitive you start from, the gate it is named after comes cheap and its opposite does not.
Step 3: Read the bubbles instead of the algebra
Section titled “Step 3: Read the bubbles instead of the algebra”Select NAND then OR and look at the dashed boxes. The first two gates are labelled inverter, because their legs are tied, and only the last one is doing the AND. So the final gate has its inputs each fed by an inverter and carries a bubble on its own output: an AND with a bubble on every port, behaving as an OR.
Now select NOR then AND and look at the same arrangement. An OR with a bubble on every port, behaving as an AND.
Putting a bubble on every port of a gate swaps AND for OR and OR for AND. You can verify that here by clicking through the inputs without writing a line of algebra. When you meet De Morgan’s theorems later, they will be a formal statement of exactly this picture.
Step 4: Follow the middle wire
Section titled “Step 4: Follow the middle wire”Select XOR on NAND. Four gates, and the output is not obvious from looking at it.
Turn Show internal levels off and set the inputs to 1,1. Predict the output before you look. Then turn the internal levels on and trace what the first gate handed to the other two.
That first NAND outputs 0 only when both inputs are 1, and it is that signal, fed back alongside each input, that lets the final gate tell “both high” apart from “both low”. Those are the two cases an XOR has to treat the same way and everything else has to treat differently, which is why this arrangement and not a simpler one.
Step 5: Wire one yourself
Section titled “Step 5: Wire one yourself”Move to the build-it frame. With NAND selected, make an OR gate.
The reasoning from Step 3 gives it to you: an OR needs both inputs inverted before the last gate, and Step 1 told you how a NAND inverts. The circuit is judged across all four input combinations, so you cannot pass by matching the inputs currently on screen.
When it goes green, switch the primitive to NOR without changing anything else and watch what the same wiring now produces. Duality, in one click.
Check your understanding
Section titled “Check your understanding”Complete the two-NAND AND gate
N1 is the output of the first NAND. Y is the output of the second, which has both its inputs tied to N1.
Building an OR gate from NAND gates costs three gates, but building an AND gate costs only two. Why?
One cell in this NOR-built AND gate is wrong
This table is supposed to describe an AND gate built from three NOR gates. One output cell does not.
Match each construction to what it takes
Why can no arrangement of AND and OR gates, however large, ever produce an inversion?
Which of these follow from NAND being universal? Select all that apply.
Wrap-up
Section titled “Wrap-up”One gate type is enough. NAND is enough, NOR is enough, and each is enough for the same reason: it can invert, and once you can invert you can undo the bubble on anything and rebuild any operation you like.
Three things are worth carrying forward.
- The bubble is the whole point. Putting one on every port of an AND turns it into an OR and the reverse, and once you can see that on a symbol you can do most of this transformation without algebra. De Morgan’s theorems, when you meet them, are that picture written down.
- Universality is about possibility, not economy. The five-gate XNOR is a fair warning here. Anything can be built from NAND, and plenty of things should not be.
- Not every set is universal, and the reason AND and OR fail is that neither can ever turn a 1 into a 0. Inversion is not a convenience bolted onto logic. It is the thing that makes the rest of it reachable.
The next question is what happens when you stop wiring gates by intuition and start deriving the wiring from a specification. That means Boolean algebra, and a set of rules for turning a truth table into a circuit and then making that circuit smaller.
© 2026 Derek Molloy, Dublin City University. All rights reserved.