Combinational and Sequential Logic Crossword

Combinational circuits compute outputs based exclusively on the current state of their inputs: an adder or multiplexer has no memory of what arrived a microsecond ago. Sequential circuits break this restriction by introducing feedback from output to input. That feedback allows a circuit to retain state, oscillate deterministically, or respond to the precise sequence and timing of clock transitions.

This crossword covers that transition in twenty-two terms across four strands:

Combinational building blocks. Half adders, full adders, multiplexers, demultiplexers, encoders, and decoders. These medium-scale functional units calculate arithmetic sums or route signals between devices, operating purely as mathematical combinations where the sequence of prior inputs does not affect the output.

Multivibrators and feedback. Feeding a signal back from an output to an input is the mechanism that turns stateless combinational gates into memory or timing elements. Multivibrators classify by stability: bistable circuits maintain either of two stable voltage states indefinitely; monostable circuits stay stable in one state until pulsed into a temporary quasi-stable state; and astable circuits possess no stable states, oscillating continuously between high and low levels.

Latches and flip-flops. The circuit elements that store single bits. Latches are level-sensitive devices controlled by an enable line, but unclocked configurations risk invalid output states when complementary inputs conflict, or race conditions when signals arrive simultaneously. Flip-flops resolve transparency by restricting data transitions strictly to the active edge of a clock pulse, enabling deterministic operations such as toggling.

Timing, clocks, and counters. The coordination of digital systems in time. Asynchronous ripple counters chain flip-flops together such that clock transitions propagate sequentially, introducing cumulative delay and brief intermediate false states. Synchronous designs clock every stage simultaneously, requiring auxiliary gating logic to coordinate count progression without ripple delay.

How it works

Click a cell and type. Clicking the same cell again switches between across and down, and the clue you are currently in is highlighted.

Check grid marks incorrect letters in red without revealing the correct ones, so a check is a prompt to reconsider a clue rather than a way of being told the answer. Clear grid empties the puzzle. Clues can be ticked off in the list as you finish them.

Where an answer has more than one word, run the words together and leave the spaces out (for example, FLIPFLOP or HALF). Where a clue has a gap in it, the missing word is the answer and the surrounding text clarifies which term is required.

Combinational and Sequential Logic Crossword

Sequential Logic & Combinational Circuits Crossword (22 terms). Where answers have multiple words, omit spaces.

derekmolloy.ie

💡 Note:Where an answer comprises multiple words, omit the space (e.g., “The best lecturer in the world!” would be entered as DEREKMOLLOY).

1

2

3

4

5

6

7

8

9

10

13

11

12

14

15

16

17

18

19

20

21

22

Check gridClear grid0/156 cells

Across

2.A multivibrator circuit whose outputs respond to data inputs strictly during the transitional edge of a clock signal.(8)

6.A combinational circuit (___ Adder) that adds two single binary digits and outputs a sum and a carry out.(4)

7.A multivibrator device that possesses only one stable output state and returns to it after a timed duration.(10)

10.A circuit (___ Adder) that calculates the sum of three binary digits, including an input carry.(4)

14.Logic circuits whose outputs depend on the specific timing or order in which inputs change.(10)

15.A circuit with one input and multiple outputs used to route a single signal to one of many devices.(13)

17.A combinational circuit that converts an n-digit binary input code into up to 2^n unique data output lines.(7)

19.The process of routing a signal from a circuit's output back to one of its inputs, enabling storage or oscillation.(8)

20.Any digital circuit that employs signal feedback from output to input.(13)

21.The mode of operation in a J-K flip-flop where the output swaps to its opposite state on each active clock pulse.(6)

22.The cumulative delay effect in asynchronous counters caused by propagation delays cascading through sequential stages.(6)

Down

1.An unordered set of items in mathematics where the order of elements does not matter.(11)

3.Inputs or circuits that change state only in step or in time with a common clock pulse transition.(11)

4.A device with multiple input lines and a single output line used to select one input signal to pass through.(11)

5.An undesirable condition where two mutually-exclusive circuit events are simultaneously initiated by a single cause.(4)

8.A basic bistable logic circuit that maintains its last output state until driven by new input signals.(5)

9.A multivibrator circuit with no stable output states that continuously oscillates back and forth between high and low.(7)

11.A type of multivibrator circuit that can hold indefinitely in either of two stable output states (0 or 1).(8)

12.A conditional control input (E or EN) that must be active for data inputs to affect a latch.(6)

13.Inputs (like Preset or Clear) that override the clock signal to immediately force a flip-flop's output state.(12)

16.An illegal output state in an S-R latch caused by simultaneously activating both Set and Reset inputs.(7)

18.A combinational logic circuit designed to convert a set of input signals into a coded binary output format.(7)

Where to look things up

The arithmetic circuits are in Half Adders, Full Adders and Carry, and signal routing components are demonstrated in Decoders, Encoders, Multiplexers and Demultiplexers.

Feedback and level-sensitive storage are examined in Latches, while clock edges and storage devices are analysed in Flip-Flops. Frequency division and the toggle action of flip-flops are explored in Clocks and the Binary Count Sequence. Cumulative propagation delay in asynchronous circuits is demonstrated in Asynchronous Counters, and Why They Ripple, and the clocking trade-offs required for simultaneous transitions appear in Synchronous Counters, and the Price of Getting It Right. Multivibrator classifications (astable, monostable, and bistable) are covered in the core chapter reading on sequential circuits.

If you get stuck

Leave it and come back. A clue that looks difficult often becomes clear once intersecting letters are in place. Notice that several terms share common technical affixes (such as -stable for multivibrator classifications, or multiplexer and demultiplexer), which can help you deduce the structure of adjacent answers.