Demo 6.3: Clocks and the Binary Count Sequence
The previous demonstration took a JK flip-flop apart. This one puts the lid back on and asks what you can build with it, and the answer turns out to rest on a single observation about how we write numbers down.
Write the numbers 0 to 15 in binary, one per line. Then stop reading across the rows, which is the natural thing to do, and read down the columns instead.
0000 Every column is a square wave. 0001 0010 The rightmost alternates every line. 0011 The next alternates every two lines. 0100 The next every four. The next every eight. 0101 0110 Each column is exactly half the 0111 frequency of the one to its right. 1000 ...Kuphaldt puts it plainly: “the LSB will oscillate at the highest frequency, followed by the next bit at one-half the LSB’s frequency, and the next bit at one-half the frequency of the bit before it.”
That is not a quirk of notation. It is the design of every binary counter ever built, because if the bits of a count are square waves at halving frequencies, then a device that halves a frequency is a device that counts. And you already have one: a JK flip-flop with both inputs tied high toggles once per clock edge, which is a division by two.
The other half of this demonstration is the horizontal axis. Everything here is drawn against t, with a clock frequency you choose, because a clock period is not a column on a diagram. It is a length of time, and at a gigahertz it is a nanosecond, which is about as long as light takes to cross a ruler.
How to use it
Section titled “How to use it”The binary count sequence puts the table and the four waveforms side by side and steps a cursor through them. The horizontal axis switches between clock periods and real time at whatever frequency you set, and the tables underneath give every bit’s frequency and period at that setting.
The JK as a black box is the device with its insides hidden. Set J and K, then click the clock and watch which of its two transitions it actually notices. The rising-edge and falling-edge symbols sit side by side so you can see that the difference between them is one bubble.
Dividing the clock by two ties J and K high and shows the result against the clock, with the frequency readouts following whatever you set on the first tab.
Clocks and the Binary Count Sequence
Why the columns of a binary count are square waves at halving frequencies, what a clock period is as a length of time, and the one flip-flop that halves a frequency.
Walkthrough
Section titled “Walkthrough”Step 1: Watch the columns, not the rows
Section titled “Step 1: Watch the columns, not the rows”Open The binary count sequence and press play, or step through it one clock at a time.
Follow Q0 first. It changes at every falling edge of the clock: 0, 1, 0, 1, all the way along. Two clock periods make one complete cycle of Q0, so Q0 is a square wave at half the clock frequency.
Now follow Q1. It changes half as often, so its period is four clock periods and its frequency is a quarter of the clock. Q2 is an eighth. Q3, the most significant bit, changes just twice in the whole sequence, giving one cycle in sixteen clock periods.
Read the frequency table on the right and check those against the numbers. Then look at the highlighted row of the count table and confirm it agrees with the waveforms at the cursor.
Step 2: Put a real timescale on it
Section titled “Step 2: Put a real timescale on it”Press Time at 1 GHz and watch the axis labels change while the waveforms stay exactly where they are. It is the same picture; only the units moved.
Now drag the frequency slider around, and read the two figures under the clock panel:
- At 1 Hz, one period is a second and light travels 299,792 km in it, most of the way to the Moon.
- At 32.768 kHz, a watch crystal, one period is 30.5 µs and light gets 9 km, across a city.
- At 16 MHz, an Arduino Uno, one period is 62.5 ns and light gets 19 m, the width of a lecture theatre.
- At 1 GHz, a Raspberry Pi 2 or 3, one period is 1 ns and light gets 30 cm.
That last one is the one to sit with. In one clock period of a 1 GHz machine, light crosses about the length of your forearm, and a signal in copper on a circuit board manages only about two thirds of that, so 20 cm.
A Raspberry Pi is roughly 8 cm across. A signal getting from one side of it to the other therefore spends something like half a clock period simply in transit, before it has done anything useful. Nothing about the design can make that faster; it is the speed of light and the size of the board.
This is why fast computers are physically small, why a processor die is a few millimetres across, and why distributing a clock across a large chip so that every corner agrees about when “now” is turns out to be one of the harder problems in the field.
Step 3: Meet the black box
Section titled “Step 3: Meet the black box”Open The JK as a black box.
There are no gates here any more. There is a rectangle with three inputs and two outputs, and two pieces of notation that carry all the meaning:
- The small triangle against the clock input is the dynamic input indicator. It says this input responds to an edge, not to a level. A latch has no triangle; that is how you tell the two apart on a schematic.
- A bubble on the outside of the boundary means active low. On the clock input it moves the action from the rising edge to the falling one.
Set J = 1 and K = 1, then click the clock button twice and watch what happens. One of those two clicks flips the output and the other does nothing at all, because a falling-edge device sees exactly one instant per clock cycle and ignores the rest of it.
Now switch to Rising edge and do it again. The device is now triggered by the other click. Compare the two symbols in the panel beside it: same box, same triangle, and one has a bubble.
Step 4: Work through the state table
Section titled “Step 4: Work through the state table”Try each row of the table in turn, clicking the clock after each change:
| J | K | What happens at the active edge |
|---|---|---|
| 0 | 0 | Hold. The output keeps whatever it had. |
| 0 | 1 | Reset. The output is forced to 0. |
| 1 | 0 | Set. The output is forced to 1. |
| 1 | 1 | Toggle. The output changes to the opposite of what it was. |
Then change J or K without clicking the clock, and notice the output does not move. J and K are not commands, they are an instruction about what to do at the next active edge. That separation is the entire reason for having a clock: the inputs are free to settle while nothing is listening.
The row that matters for everything after this is the last one. Hold, set and reset are all things a plain latch could do. Toggle is the one that needs the feedback, because the output depends on its own previous value, and that is what makes the circuit sequential rather than combinational.
Finally, press Pulse CLR low. The output goes to 0 immediately, with no clock edge involved at all. That is what asynchronous means, and it is how a counter is reset to zero without having to clock through the rest of the sequence. Note the bubble on that input too: it is active low, so an unused clear is tied high, which is the pull-up resistor demonstration turning up again in a new context.
Step 5: Turn a toggle into a divider
Section titled “Step 5: Turn a toggle into a divider”Open Dividing the clock by two.
J and K are now strapped permanently to logic 1, so the only row of the state table available is toggle. Every active edge, the output flips. That is the whole circuit.
Count the edges and the arithmetic is forced:
- There is exactly one active edge per clock period.
- There is exactly one output transition per active edge.
- Every complete cycle of a square wave contains two transitions, one up and one down.
- So one output cycle needs two active edges, which is two input periods. Divide by exactly two.
Not approximately two, and not two on average. It is a matter of counting rather than of measurement, and nothing about it depends on the shape of the clock, how long it stays high, or the frequency.
There is a useful side effect worth noticing: the output comes out with a clean 50% duty cycle even if the input was lopsided, because the output only knows about edges and not about what happened between them. Dividers are sometimes put into a circuit for that reason alone.
Step 6: Close the loop
Section titled “Step 6: Close the loop”Now compare the Q waveform on this tab with the Q0 waveform on the first tab.
They are the same waveform. Not similar, identical: one flip-flop in toggle mode produces exactly the least significant bit of a binary count.
Which raises the obvious question. If one of these gives you the first column, what gives you the second? Q1 is half the frequency of Q0, and you have a device that halves frequencies, so feed Q0 into another one. Then a third, and a fourth.
Four flip-flops in a chain, each clocking the next, and the four outputs are the four columns of the count table. That is a counter, and it is the next demonstration.
Check your understanding
Section titled “Check your understanding”In a four-bit binary count driven by a 1 GHz clock, what is the frequency of the most significant bit Q₃?
A JK flip-flop symbol has a triangle against its clock input and a bubble on the outside of that same input. What does that combination mean?
Why does a JK flip-flop with both inputs tied high divide its clock frequency by exactly two, rather than approximately two?
Match each item to what it is
Which of these are true of a clocked flip-flop between one active clock edge and the next? Select all that apply.
Wrap-up
Section titled “Wrap-up”Five things to take away.
- The columns of a binary count are square waves at halving frequencies. The LSB runs at half the clock, the next at a quarter, the next at an eighth. Read down the columns rather than across the rows and this is impossible to miss.
- A bit changes only when every bit below it goes from 1 back to 0. That observation is the counter, and the next demonstration builds it from exactly that sentence.
- The triangle means edge triggered and the bubble means the falling edge. Two marks, two independent facts, and misreading the bubble halves the number of edges you thought you had.
- Toggle mode divides by exactly two, by a counting argument that has nothing to do with time, duty cycle or frequency. One toggling flip-flop produces precisely the least significant bit of a binary count.
- A clock period is a length of time. One nanosecond at a gigahertz, in which light travels about 30 cm and a signal on a board about 20. That is the real reason fast computers are small.
What comes next is the obvious construction. If one divider gives you the first column of the count, chain four of them and you have all four, which is an asynchronous or ripple counter. It works, and it has a fault: each flip-flop’s output arrives a propagation delay after its clock, so in a chain those delays accumulate, and for a few tens of nanoseconds the four outputs show a count that was never supposed to exist. The synchronous counter fixes it by clocking every stage from the same signal and using gates to decide which stages should toggle. Both have demonstrations of their own, and both start from the two ideas on this page.
© 2026 Derek Molloy, Dublin City University. All rights reserved.